Position : Hardware Developer (FPGA)
    Exp : 4 to 12 yrs
    Client : Japan based MNC 
    Location : Atsugi, Japan
    Payroll : Sunwell Solution Co. Ltd, JAPAN
    JLPT : N4 Or above

    FPGA Packet communication between the devices
      LVDS 320MHz
      Send / receive packet of header, command, data (proprietary specification)
      SLOT divide and manage the timing of interdevice transfer


    Work contents

    Device Altera Cyclon SoC
    Structural design document Block diagram,IO table, Timing diagram etc
    Test specification Testing environment, Test items etc.
    COding Verilog
    Logic synthesisLayout Quartus
    Simulation Questa-Sim

    Skill Required (MUST) :
    Should be able to speak, read & write in Japanese

    If your interested with the above profile, request you to send us your updated CV to padma@autosoftindia.co.in

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