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We are hiring for RTL Design Engineer & SOC Verification United Kingdom (London) Full Time 

Company Name: Shell Info Technologies Private Limited

Position Title: SOC Verification Engineer

Experience Required: 5 to 7 years

Location : UK (London)

Main activity would be verification so would need to understand testbenches.
Expected to perform tasks such as stitching IP together and running simulations to prove connectivity
Help with ramp-up and understanding the needs of the project.

Knowledge/Skills required: 
Familiarity with Arm IP 
Knowledge on Cortex-A processor 
Understand Verilog RTL & SystemVerilog
Knowledge on writing assembly or C tests
An understanding of makefiles is necessary
Familiarity with simulators including Mentor Questasim, Synopsys VCS & Cadence Incisive

Nice to have:
Knowledge on Coresight debug 
Understanding Linting and DFT checks

Position Title: RTL Design Engineer


Senior: 8+ years must have experience of managing teams

Intermediate: 5- 8 years

Job description:
VHDL and System Verilog Experience
ASIC Experience
Experience of creating RTL designs from scratch and integrating existing RTL IP
Experience of Synthesis and STA (Static Timing Analysis)

Interested candidate can share the resume at

Expected CTC
Notice Period

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